Description: Digital Gate Compiler is a tool for the creation of digital netlists. DGC does an optimization and technology mapping for an abstract description of boolean functions and state machines. Output formats are EDIF, XNF and VHDL. Input formats are KISS, PLA and others.
Please login to add feedback.
This update has been submitted for stable
This update has been submitted for testing
This update has been pushed to testing
This update has been submitted for stable
This update has been pushed to stable